As the semiconductor industry has progressed into nanometer technology process nodes in pursuit of higher device density, higher performance, and lower costs, challenges from both fabrication and design issues have greater. For example, multilayer resist structures are used for forming vias and interconnects above a semiconductor device, such as a FinFET transistor. As semiconductor devices become smaller, layers of the multilayer resist structure become thinner, and wrinkling of the layers becomes more pronounced relative to the thickness of the layer. Wrinkling of multilayer resist structures can cause problems in manufacturing semiconductor devices, such as FinFET devices.